For someone more in tune with the process, honest question: how is this not a failure on ASML, who makes the lithography machines? Or the company who makes the ultra pure silicon wafers? Is Intel just feeding unetchable garbage into the machines?
I think there’s more to it - IIRC, this is Intel’s factory
Things that can mess up a batch- clean room not clean enough, vibrations from walking/vehicles/tectonic activity/lack of mechanical precision, temperature variations, impurities in chemicals or wafers, em interference, static charges, etc
We’re talking a few dozen atoms in the wrong place, the tolerances are minuscule when you’re making modern chips. A small problem in the supply chain, process, or the building itself could all kill your yield
I’m not an expert or anything, but I know this is a very unforgiving field
TSMC and Intel both use ASML lithography, but there are many many more steps than just lithography - Intel, TSMC, Samsung and other chipmakers use different processes to make the components on their chips (many of which are patented and so owned by specific parties).
These things include the physical structure of the components and wiring on the chip, how the silicon is doped and with what ions, what coatings are put on to be etched in the lithography and what coatings are applied to the etched layers, how the chips are packaged and also how multiple chips can be combined into one package.
Basically there are similarities but also hige differences between the different manufacturers, and a lot of trade secrets.
If you’re interested in this kind of thing, I’d recommend the youtube channel Asianometry - the content creator is amazing.
For someone more in tune with the process, honest question: how is this not a failure on ASML, who makes the lithography machines? Or the company who makes the ultra pure silicon wafers? Is Intel just feeding unetchable garbage into the machines?
I think there’s more to it - IIRC, this is Intel’s factory
Things that can mess up a batch- clean room not clean enough, vibrations from walking/vehicles/tectonic activity/lack of mechanical precision, temperature variations, impurities in chemicals or wafers, em interference, static charges, etc
We’re talking a few dozen atoms in the wrong place, the tolerances are minuscule when you’re making modern chips. A small problem in the supply chain, process, or the building itself could all kill your yield
I’m not an expert or anything, but I know this is a very unforgiving field
TSMC and Intel both use ASML lithography, but there are many many more steps than just lithography - Intel, TSMC, Samsung and other chipmakers use different processes to make the components on their chips (many of which are patented and so owned by specific parties).
These things include the physical structure of the components and wiring on the chip, how the silicon is doped and with what ions, what coatings are put on to be etched in the lithography and what coatings are applied to the etched layers, how the chips are packaged and also how multiple chips can be combined into one package.
Basically there are similarities but also hige differences between the different manufacturers, and a lot of trade secrets.
If you’re interested in this kind of thing, I’d recommend the youtube channel Asianometry - the content creator is amazing.
Thanks for the detailed and thoughtful response. I’ll definitely check out the YouTube channel you shared!
TSMC uses the same lithography and same wafers and gets working chips. It’s the fab process. Is it fixable? Idk.
Bad craftsmen always blame their tools